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Data Sheet
APPLICATIONS INFORMATION
ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404
The dc-to-dc converter section of the ADuM640x works on
principles that are common to most switching power supplies. It
has a secondary side controller architecture with isolated pulse-
width modulation (PWM) feedback. V DD1 power is supplied to
an oscillating circuit that switches current into a chip scale air
core transformer. Power transferred to the secondary side is
rectified and regulated to either 3.3 V or 5 V. The secondary
The total lead length between the ends of the low ESR capacitor
and the input power supply pin must not exceed 2 mm. Installing
the bypass capacitor with traces more than 2 mm in length may
result in data corruption. Consider bypassing between Pin 1
and Pin 8 and between Pin 9 and Pin 16 unless both common
ground pins are connected together close to the package.
BYPASS < 2mm
(V ISO ) side controller regulates the output by creating a PWM
control signal that is sent to the primary (V DD1 ) side by a dedicated
i Coupler data channel. The PWM modulates the oscillator
circuit to control the power being sent to the secondary side.
Feedback allows for significantly higher power and efficiency.
The ADuM640x implements undervoltage lockout (UVLO)
with hysteresis on the V DD1 power input. This feature ensures
V DD1
GND 1
V IA /V OA
V IB /V OB
V IC /V OC
V ID /V OD
V DDL
GND 1
V ISO
GND ISO
V IA /V OA
V IB /V OB
V IC /V OC
V ID /V OD
V SEL
GND ISO
that the converter does not enter oscillation due to noisy input
power or slow power-on ramp rates.
A minimum load current of 10 mA is recommended to ensure
optimum load regulation. Smaller loads can generate excess noise
on chip due to short or erratic PWM pulses. Excess noise that is
generated in this way can cause data corruption, in some cases.
PCB LAYOUT
The ADuM640x digital isolators with 0.4 W iso Power integrated
dc-to-dc converter require no external interface circuitry for the
logic interfaces. Power supply bypassing is required at the input
and output supply pins (see Figure 27). Note that low ESR bypass
capacitors are required between Pin 1 and Pin 2 and between
Pin 15 and Pin 16, as close to the chip pads as possible.
The power supply section of the ADuM640x uses a 180 MHz
oscillator frequency to pass power efficiently through its chip
scale transformers. In addition, the normal operation of the data
section of the i Coupler introduces switching transients on the
power supply pins. Bypass capacitors are required for several
operating frequencies. Noise suppression requires a low induc-
tance, high frequency capacitor, whereas ripple suppression and
proper regulation require a large value capacitor. These capacitors
are most conveniently connected between Pin 1 and Pin 2 for
V DD1 , and between Pin 15 and Pin 16 for V ISO .
To suppress noise and reduce ripple, a parallel combination of
at least two capacitors is required. The recommended capacitor
values are 0.1 μF and 10 μF for V DD1 and V ISO . The smaller
capacitor must have a low ESR; for example, use of a ceramic
capacitor is advised.
Figure 27. Recommended PCB Layout
In applications involving high common-mode transients, ensure
that board coupling across the isolation barrier is minimized.
Furthermore, design the board layout such that any coupling that
does occur affects all pins equally on a given component side.
Failure to ensure this can cause voltage differentials between
pins exceeding the absolute maximum ratings for the device
as specified in Table 19, thereby leading to latch-up and/or
permanent damage.
The ADuM640x is a power device that dissipates approximately
1 W of power when fully loaded and running at maximum speed.
Because it is not possible to apply a heat sink to an isolation
device, the device primarily depends on heat dissipation into
the PCB through the GND pins. If the device is used at high
ambient temperatures, provide a thermal path from the GND
pins to the PCB ground plane. The board layout in Figure 27
shows enlarged pads for Pin 8 (GND 1 ) and Pin 9 (GND ISO ).
Multiple vias should be implemented from the pad to the ground
plane to significantly reduce the temperature inside the chip.
The dimensions of the expanded pads are at the discretion of
the designer and depend on the available board space.
START-UP BEHAVIOR
The ADuM640x devices do not contain a soft start circuit.
Therefore, the start-up current and voltage behavior must be
taken into account when designing with this device.
When power is applied to V DD1 , the input switching circuit begins
to operate and draw current when the UVLO minimum voltage
is reached. The switching circuit drives the maximum available
power to the output until it reaches the regulation voltage where
PWM control begins. The amount of current and the time
required to reach regulation voltage depends on the load and
the V DD1 slew rate.
With a fast V DD1 slew rate (200 μs or less), the peak current draws
up to 100 mA/V of V DD1 . The input voltage goes high faster than
the output can turn on, so the peak current is proportional to
the maximum input voltage.
Rev. A | Page 21 of 28
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